The present disclosure relates to semiconductor structures and methods and, more particularly, to semiconductor structures that comprise one or more pairs of vertical field effect transistors with each pair having a shared source/drain region and methods of forming such structures.
More particularly, integrated circuit design decisions are often driven by device scalability, manufacturing efficiency and costs. For example, size scaling of single-gate planar field effect transistors (FETs) resulted in devices with a smaller channel length. Unfortunately, the smaller channel length resulted in a corresponding increase in short channel effects and a decrease in drive current. In response, different types of multi-gate non-planar field effect transistors (MUGFETs), such as dual-gate non-planar FETs (also referred to herein as fin-type FETs (FINFETs)) and tri-gate non-planar FETs, which comprise one or more semiconductor fins, were developed in order to provide reduced-size field effect transistors, while simultaneously avoiding corresponding increases in short channel effects and decreases in drive current. Unfortunately, further size scaling of conventional MUGFETs has been limited by the required specifications for the different features of such devices. For example, a minimum gate length is required in order to switch a MUGFET on and off. This minimum gate length must, in turn, be considered in setting the pitch between source/drain contacts. Additionally, in MUGFETs that incorporate multiple semiconductor fins to increase transistor width and, thereby drive current, the pitch between semiconductor fins must be sufficiently large so as to allow for deposition of gate material between the semiconductor fins. Finally, the thickness of the semiconductor layer used to form the MUGFET must be equal to the height of the semiconductor fin(s). Therefore, there is a need in the art for a semiconductor structure and method of forming the structure that allows for further size scaling of FETs over what has heretofore been available with conventional planar FETs and MUGFETs.